1. Field of the Invention
The present invention relates to a timing recovery circuit in a digital demodulator for demodulating received modulated signal by a digital method, and more particularly, to a timing interpolator for directly calculating tap-coefficients by reading sine function values at each clock after storing M number of sine function values in a memory instead of (L+1).times.M number of tap-coefficients, when (L+1) number of filter tap and M number of phase value are used in the demodulating process.
2. Description of the Prior Art
In digital communication system, a receiver samples transmitted analog signal in a predetermined sampling clock converting it into a digital signal. A carrier signal having frequency and phase corresponding to modulators used in a transmitter is recovered from the digital signal, and a demodulation is performed by using the recovered carrier signal to recover an original information signal. In a timing recovery circuit, an exact sampling clock, which affects the efficiency of the receiver, is determined.
In digital modems, when sampling is synchronized with data symbol, a feedback loop for controlling the sampling clock by adjusting the phase of local clock or a feedforward loop utilizing regenerated timing wave from the received modulation signal is used, as in an analog modem. When the sampling is not synchronized with the data symbol, namely if the sampling clock is not related to the symbol timing the timing is controlled by an interpolation. By interpolating between unsynchronized samples. an exact strobe values in the modem are generated, similar to the strobe values generated when the sampling is synchronized with the symbol.
FIG. 1 shows a block diagram of a conventional digital timing recovery unit, that performs the timing recovery using a feedback loop. The digital timing recovery unit comprises a sampling clock generator 11, a first sampler 12, an interpolator 13, a data filter 14, a timing error detector 15, a loop filter 16, and a controller 17.
In FIG. 1, the sampling clock generator 11 generates a sampling clock in period Ts, in which alising does not occur. The first sampler 12 generates signal X(mTs), which samples a band limited input signal X(t) according to the sampling clock, and outputs it. The interpolator 13 generates and outputs an interpolant y(kTi) for interpolating the signal X(mTs) in interpolation interval Ti. The data filter 14 filters the interpolant y(kTi) to output the final strobe data. The timing error detector 15 detects a timing error from the strobe data. The loop filter 16 removes a noise component of the detected timing error. The controller 17 controls an operation of the interpolator 13 by using the filtered timing error to perform the exact timing recovery.
Referring to FIG. 2, a digitization of the interpolator 13 will be described in detail. FIG. 2 shows a block diagram for explaining an operation of the interpolator 13 in FIG. 1. The interpolator 13 comprises a digital/analog (D/A) converter 21, an interpolating filter 22, and a second sampler 23. In FIG. 2, a sampled signal X(mTs) from a first sampler 12 shown in FIG. 1 is converted into an analog signal x(t) by the D/A converter 21. The converted analog signal x(t) is filtered by the interpolating filter 22 to generate an interpolator signal y(t). The interpolator signal y(t) is resampled by the second sampler 23 to be outputted as an interpolant y(kTi). Here, the sampling interval of the second sampler 23, namely the interval between the interpolants Ti is provided from the controller 17 in FIG. 1.
An output y(t) from the interpolating filter 22 is expressed by the following expression 1, when an impulse response of the interpolating filter 22 is h.sub.1 (t).
Expression 1. ##EQU1##
Here, the original signal x(t) does not coincide with the filtered signal y(t). A new sample is obtained by resampling the output y(t) at t=kTi in the second sampler 23, namely interpolant y(kTi), which is expressed by the following expression 2.
Expression 2. ##EQU2##
In the above expression 2, if the input signal x(m), the impulse response h.sub.1 (t) of the interpolating filter 22, the sampling interval mTs of the first sampler 12, and the sampling interval kTi of the second sampler 23 are known, the interpolant can be calculated digitally from the above expression 2.
To define the variables used in the expression 2, when m is a signal index, a filter index i, basic point index m.sub.k, fractional interval .mu..sub.k can be calculated by the following expression
Expression 3.
Signal index: m ##EQU3##
In the above expression 3, intz! refers to the largest integer not exceeding z, where 0.ltoreq. .mu..sub.k .ltoreq.1. Here, the fractional interval .mu..sub.k is very important for adjusting the resampling interval of the interpolator 13, and it is calculated in the controller 17 to be provided to the second sampler 23.
Meanwhile, the variations in the fractional interval .mu..sub.k in respect to the relationship between the intervals Ts and Ti of the first sampler 11 and second sampler 23, respectively, are examined. First, when Ti cannot fractionally reduce with Ts, the fractional interval .mu..sub.k will be irrational and will change for each interpolant. Second, if Ti is assumed to be very nearly equal to Ts, as if the sampling is nearly synchronized, then the fractional interval .mu..sub.k changes very slowly; if it is quantized, it remains constant over many interpolants. Third, if Ts fractionally reduces with Ti, but not equal Ti, then the fractional interval .mu..sub.k repeats periodically. The expression 2 can be alternatively expressed into the following expression 4 through the substitution by the variables from the expression 3.
Expression 4. ##EQU4##
A digital interpolation in a modem can be achieved by the above expression 4. The impulse response value h.sub.I (i+.mu..sub.k)Ts! of the interpolating filter 22 is a filter tap-coefficient.
The interpolator 13 can be comprised of a Finite Impulse Response (FIR) having a delay shift register, a multiplier, and an adder. The interpolator of the system operating in a high speed stores a calculated filter tap-coefficient in a separate memory; for example, a ROM, and reads filter tap-coefficients in time units, namely the clock units, to perform the interpolation. Here, the tap-coefficients of the interpolation are obtained by a polynomial filter or a polyphase filter. For example, in the polyphase filter having (L+1) number of taps, when M number of phase values per one tap are used, the total of (L+1).times.M number of tap coefficients are obtained. Accordingly, the number of tap-coefficients stored in the memory is (L+1).times.M, when the filter index i is a variable in the impulse response, the number of tap is (L+1), and the number of fractional interval .mu..sub.k is M.
As described above, since the number of tap in the interpolating filter is related to the transmission speed of a signal or to the operating speed of a system, the number of calculated filter tap coefficients increases when the system is operated in high speed. Accordingly, there is a need to increase the memory capacity for storing the tap-coefficients.